The present invention relates to integrated circuits, and more particularly, to a control circuit for controlling the impedance of an output driving stage of an integrated circuit.
In general, integrated circuits such as semiconductor memories, for example, are provided with output driving stages or output buffers which make it possible to obtain output signals (e.g., signals containing the digital data being read by the memory) with voltage or current levels suitable to drive the components which, in the electronic system, follow the integrated circuit.
In the case of semiconductor memories, the output buffers are typically of the inverting type, and each one comprises a plurality of pull-up transistors and a plurality of pull-down transistors respectively connected in parallel. For example, in the case of CMOS technology integrated circuits, the pull-up and pull-down transistors can be metal oxide semiconductor field effect transistors (MOSFETs) of the P-channel and N-channel type, respectively.
It is known that data transfer from a first integrated circuit to a second integrated circuit, for example, from a semiconductor memory such as a Flash memory to a receiving device such as a microprocessor, requires an impedance matching between the output buffer and the data line. The data line includes the bus along which data are carried. In fact, in non-matching conditions, reflections along the bus data line delay data transfer to the receiving device.
For this reason, the number and dimension characteristics of the pull-down and pull-up transistors in the output buffers are chosen in such a way as to satisfy the impedance matching. However, due to the fact that the parameter characteristics of the transistors used in the output buffers depend on temperature, and as this varies, the resistivity of the output buffers may also vary causing the matching conditions to worsen.
To compensate for these variations in the resistivity, conventional output buffers use pull-up and pull-down transistors which can be enabled selectively by enabling/disabling signals generated by a special control circuit. In this way, the configuration of the transistors enabled inside the output buffer can be modified by the control circuit in such a way as to maintain the impedance matching so that it is unchanged with the temperature.
Circuits to control impedance of the output buffers which use a group of control transistors connected in parallel, whose impedance is correlated to that of the output buffer and is variable with the temperature in correlation with the variations in the output buffer impedance, are well known. Furthermore, the control circuits use a reference circuit component, such as a resistor, whose impedance is stable with temperature and is proportional to that of the data line to which the output buffer is to be connected. A special control circuit, on the basis of a signal deriving from the control transistors and a signal deriving from the reference element, detects the presence of a non-matching situation and generates the pull-up and pull-down transistor enabling/disabling signals in such a way as to restore the matching condition.
It should be noted that conventional control circuits may present different implementation characteristics but, in any case, they require the use of a reference circuit component which remains stable in varying temperatures. The circuit component is of the discrete type and, therefore, has the disadvantage that it cannot be integrated onto the same chip as the output buffer.
In view of the foregoing background, an object of the present invention is to manufacture a circuit to control the impedance of an output driving stage which avoids the use of discrete type circuit components and which can, therefore, be fully integrated onto the same chip that includes the driving circuit.
This and other objects, advantages and features according to the present invention are provided by an output driving stage impedance control circuit of an integrated circuit which comprises a plurality of driving transistors comprising at least one enabling/disabling transistor.
The control circuit comprises variable impedance means whose impedance varies with the temperature in correlation with the impedance of the output driving stage, and control means connected to the variable impedance means such as to generate a first signal for enabling/disabling the at least one transistor according to a control signal correlated to the impedance of the variable impedance means.
The control circuit further comprises current generation means to inject into the variable impedance means a current which is substantially stable with the temperature.